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Volumn 56, Issue 3, 2001, Pages 213-229

Optimal scheduling algorithm for minimizing the computing period of cyclic synchronous tasks on multiprocessors

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; EMBEDDED SYSTEMS; ITERATIVE METHODS; PARALLEL ALGORITHMS; RESPONSE TIME (COMPUTER SYSTEMS); SYNCHRONIZATION;

EID: 0035868370     PISSN: 01641212     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0164-1212(00)00099-6     Document Type: Article
Times cited : (14)

References (26)
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    • 0023326884 scopus 로고
    • Interprocessor traffic scheduling algorithm for multiple-processor networks
    • Bianchini R.P., Shen J.P. Interprocessor traffic scheduling algorithm for multiple-processor networks. IEEE Trans. Computers. 36:1987;396-409.
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    • Data flow supercomputers
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    • A note on task allocation and scheduling models for multiprocessor digital signal processing
    • Krishnan C., Piriyakumar D., Murthy C. A note on task allocation and scheduling models for multiprocessor digital signal processing. IEEE Trans. Signal Processing. 43:1995;802-805.
    • (1995) IEEE Trans. Signal Processing , vol.43 , pp. 802-805
    • Krishnan, C.1    Piriyakumar, D.2    Murthy, C.3
  • 13
    • 0023138886 scopus 로고
    • Static scheduling of synchronous data flow programs for digital signal processing
    • Lee A., Messerschmitt D.G. Static scheduling of synchronous data flow programs for digital signal processing. IEEE Trans. Computers. 36:1987;24-35.
    • (1987) IEEE Trans. Computers , vol.36 , pp. 24-35
    • Lee, A.1    Messerschmitt, D.G.2
  • 15
    • 0024106885 scopus 로고
    • Heuristic algorithms for tasks assignment in distributed systems
    • Lo V.M. Heuristic algorithms for tasks assignment in distributed systems. IEEE Trans. Computers. 37:1988;1384-1397.
    • (1988) IEEE Trans. Computers , vol.37 , pp. 1384-1397
    • Lo, V.M.1
  • 19
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    • Task allocation model for distributed systems
    • Sagar G., Sarje A.K. Task allocation model for distributed systems. Int. J. Systems Sci. 22:1991;1671-1678.
    • (1991) Int. J. Systems Sci. , vol.22 , pp. 1671-1678
    • Sagar, G.1    Sarje, A.K.2
  • 20
    • 0027542932 scopus 로고
    • A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures
    • Sih G.C., Lee E.A. A compile-time scheduling heuristic for interconnection-constrained heterogeneous processor architectures. IEEE Trans. Parallel and Distributed Systems. 4:1993;175-187.
    • (1993) IEEE Trans. Parallel and Distributed Systems , vol.4 , pp. 175-187
    • Sih, G.C.1    Lee, E.A.2
  • 23
    • 0025673181 scopus 로고
    • Multiprocessor scheduling with communication delays
    • Veltman B., Lageweg B.J. Multiprocessor scheduling with communication delays. Parallel Computing. 16:1990;173-182.
    • (1990) Parallel Computing , vol.16 , pp. 173-182
    • Veltman, B.1    Lageweg, B.J.2
  • 24
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    • A practical data flow computer
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  • 25
    • 0031076923 scopus 로고    scopus 로고
    • On runtime parallel scheduling for processor load balancing
    • Wu M.-Y. On runtime parallel scheduling for processor load balancing. IEEE Trans. Parallel and Distributed Systems. 8:1997;173-186.
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.