Design and performance of improved lumped-distributed Wilkinson divider topology

Electronics Letters

Volumn 37, Issue 8, 2001, Pages 501-503

  Chongcheawchamnan, M ^a   Siripon, N ^a   Robertson, I D ^a  

^a UNIVERSITY OF SURREY   (United Kingdom)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; ELECTRIC ADMITTANCE; ELECTRIC GROUNDING; ELECTRIC IMPEDANCE; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK TOPOLOGY; FREQUENCY DIVIDING CIRCUITS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; RESISTORS; TRANSMISSION LINE THEORY;

LUMPED DISTRIBUTED WILKINSON DIVIDER; PARASITIC EFFECTS;

MONOLITHIC MICROWAVE INTEGRATED CIRCUITS;

EID: 0035848722     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:20010356     Document Type: Article

References (6)

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5. TOKOMITSU, T., HARA, S., TAKENAKA, T., and AIKAWA, M.: 'Divider and combiner line-unified FET's as basic circuit function modules - Part II', IEEE Trans. Microw. Theory Tech., 1990, 38, (10), pp. 1218-1226
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