-
1
-
-
0032592096
-
Design challenges of technology scaling
-
Borkar S., "Design Challenges of Technology Scaling", IEEE Micro, Vol. 19, No 4, pp. 23-29, 1999.
-
(1999)
IEEE Micro
, vol.19
, Issue.4
, pp. 23-29
-
-
Borkar, S.1
-
2
-
-
0034297471
-
Cosmic-Ray soft error rate characterization of a standard 0.6-mu/m CMOS process
-
Hazucha P., Svensson C., and Wender S.A., "Cosmic-Ray Soft Error Rate Characterization of a Standard 0.6-mu/m CMOS Process", IEEE Journal of Solid-State Circuits, Vol. 35, No 10, pp. 1422-1429, 2000.
-
(2000)
IEEE Journal of Solid-State Circuits
, vol.35
, Issue.10
, pp. 1422-1429
-
-
Hazucha, P.1
Svensson, C.2
Wender, S.A.3
-
3
-
-
0033080235
-
Simple method for estimating neutron-induced soft error rates based on modified BGR model
-
Tosaka Y., Kanata H., Satoh S., and Itakura T., "Simple Method for Estimating Neutron-Induced Soft Error Rates Based on Modified BGR Model", IEEE Electron Device Letters, Vol. 20, No 2, pp. 89-91, 1999.
-
(1999)
IEEE Electron Device Letters
, vol.20
, Issue.2
, pp. 89-91
-
-
Tosaka, Y.1
Kanata, H.2
Satoh, S.3
Itakura, T.4
-
4
-
-
0012943363
-
Error-correcting codes for semiconductor memory applications: A state of the art review
-
Digital Press, 2nd edition
-
Chen C.L., Hsiao M.Y., "Error-correcting Codes for Semiconductor Memory Applications: A State of the Art Review", In Reliable Computer Systems - Design and Evaluation, pp. 771-786, Digital Press, 2nd edition, 1992.
-
(1992)
Reliable Computer Systems - Design and Evaluation
, pp. 771-786
-
-
Chen, C.L.1
Hsiao, M.Y.2
-
5
-
-
85008048174
-
The future of systems research
-
Hennessy J., "The Future of Systems Research", IEEE Computer, Vol. 32, No 8, pp. 27-33, 1999.
-
(1999)
IEEE Computer
, vol.32
, Issue.8
, pp. 27-33
-
-
Hennessy, J.1
-
6
-
-
0021626002
-
Fault-tolerant Microprocessor-based Systems
-
Johnson B.W., "Fault-tolerant Microprocessor-based Systems", IEEE Micro, Vol. 4, No 6, pp. 6-21, 1984.
-
(1984)
IEEE Micro
, vol.4
, Issue.6
, pp. 6-21
-
-
Johnson, B.W.1
-
7
-
-
0020152817
-
Concurrent error detection in ALUs by recomputing with shifted operands
-
Patel J.H., Fung L.Y., "Concurrent Error Detection in ALUs by Recomputing with Shifted Operands", IEEE Transactions on Computers, Vol. 31, No 7, pp. 589-595, 1982.
-
(1982)
IEEE Transactions on Computers
, vol.31
, Issue.7
, pp. 589-595
-
-
Patel, J.H.1
Fung, L.Y.2
-
8
-
-
0033349322
-
Soft-error detection through software fault-tolerance techniques
-
Albuquerque(NM), USA, IEEE
-
Rebaudengo M., Sonza Reorda M., Torchiano M., Violante M., "Soft-error Detection through Software Fault-tolerance Techniques", International Symposium on Defect and Fault Tolerance in VLSI Systems, Albuquerque(NM), USA, IEEE, pp. 210-218, 1999.
-
(1999)
International Symposium on Defect and Fault Tolerance in VLSI Systems
, pp. 210-218
-
-
Rebaudengo, M.1
Sonza Reorda, M.2
Torchiano, M.3
Violante, M.4
-
9
-
-
0033750857
-
Self-Checking circuits versus realistic faults in very deep submicron
-
Montreal, Canada
-
Anghel L., Nicolaidis M., Alzaher-Noufal I., "Self-Checking Circuits versus Realistic Faults in Very Deep Submicron", Proceedings of the 18th IEEE VLSI Test Symposium, Montreal, Canada, pp. 55-63, 2000.
-
(2000)
Proceedings of the 18th IEEE VLSI Test Symposium
, pp. 55-63
-
-
Anghel, L.1
Nicolaidis, M.2
Alzaher-Noufal, I.3
-
10
-
-
0026885667
-
Design of self-checking circuits using DCVS Logic: A case study
-
Kanopoulos N., Pantzartzia D., Bartram F.R., "Design of Self-checking Circuits Using DCVS Logic: A Case Study", IEEE Transactions on Computers, Vol. 41, No 7, pp. 891-896, 1992.
-
(1992)
IEEE Transactions on Computers
, vol.41
, Issue.7
, pp. 891-896
-
-
Kanopoulos, N.1
Pantzartzia, D.2
Bartram, F.R.3
-
11
-
-
0032684765
-
Time redundancy based soft-error tolerance to rescue nanometer technologies
-
Dana Port(CA), USA, IEEE
-
Nicolaidis M., "Time Redundancy Based Soft-Error Tolerance to Rescue Nanometer Technologies", Proceedings of the 17th IEEE VLSI Test Symposium, Dana Port(CA), USA, IEEE, pp. 86-94, 1999.
-
(1999)
Proceedings of the 17th IEEE VLSI Test Symposium
, pp. 86-94
-
-
Nicolaidis, M.1
-
12
-
-
33847113086
-
Cost reduction and evaluation of a temporary faults detecting technique
-
Paris, France, ACM
-
Anghel L., Nicolaidis M., "Cost Reduction and Evaluation of a Temporary Faults Detecting Technique", Proceedings of the Design, Automation and Test in Europe Conference and Exhibition 2000, Paris, France, ACM, pp. 591-598, 2000.
-
(2000)
Proceedings of the Design, Automation and Test in Europe Conference and Exhibition 2000
, pp. 591-598
-
-
Anghel, L.1
Nicolaidis, M.2
-
13
-
-
77955858107
-
G4: A fault-tolerant. CMOS mainframe
-
Munich, Germany, IEEE
-
Spainhower L., Gregg T., "G4: A Fault-Tolerant. CMOS Mainframe", Proceedings of the International Symposium on Fault-Tolerant Computing, Munich, Germany, IEEE, pp. 432-440, 1998.
-
(1998)
Proceedings of the International Symposium on Fault-Tolerant Computing
, pp. 432-440
-
-
Spainhower, L.1
Gregg, T.2
-
14
-
-
0030379651
-
Incorporating fault tolerance in superscalar processors
-
Trivandrum, India, IEEE
-
Franklin M., "Incorporating Fault Tolerance in Superscalar Processors", Proceedings of the 3rd International Conference on High Performance Computing, Trivandrum, India, IEEE, pp. 301-306, 1996.
-
(1996)
Proceedings of the 3rd International Conference on High Performance Computing
, pp. 301-306
-
-
Franklin, M.1
-
15
-
-
0024913502
-
A study of time-redundant fault-tolerance techniques for high-performance pipelined computers
-
Chicago(IL), USA, IEEE
-
Sohi G.S., Franklin M., Saluja K.K., "A Study of Time-Redundant Fault-Tolerance Techniques for High-Performance Pipelined Computers", Proceedings of the International Symposium on Fault-Tolerant Computing, Chicago(IL), USA, IEEE, pp. 436-449, 1989.
-
(1989)
Proceedings of the International Symposium on Fault-Tolerant Computing
, pp. 436-449
-
-
Sohi, G.S.1
Franklin, M.2
Saluja, K.K.3
-
16
-
-
37249076538
-
Time redundant error correcting adders and multipliers
-
Dallas(TX), USA, IEEE
-
Hsu Y.M., Swartzlander, Jr. E.E., "Time Redundant Error Correcting Adders and Multipliers", IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, Dallas(TX), USA, IEEE, pp. 247-256, 1992.
-
(1992)
IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
, pp. 247-256
-
-
Hsu, Y.M.1
Swartzlander E.E., Jr.2
-
17
-
-
0034590713
-
Fault tolerance through re-execution in multiscalar architecture
-
New York(NY), USA, IEEE
-
Rashid F., Saluja K.K., Ramanathan P., "Fault Tolerance through Re-execution in Multiscalar Architecture", Proceedings of the International Conference on Dependable Systems and Networks, New York(NY), USA, IEEE, pp. 482-491,2000.
-
(2000)
Proceedings of the International Conference on Dependable Systems and Networks
, pp. 482-491
-
-
Rashid, F.1
Saluja, K.K.2
Ramanathan, P.3
-
18
-
-
0032597692
-
AR-SMT: A microarchitectural approach to fault tolerance in microprocessors
-
USA, IEEE
-
Rotenberg E., "AR-SMT: A Microarchitectural Approach to Fault Tolerance in Microprocessors", Proceedings of the International Symposium on Fault-Tolerant Computing, Madison(WI), USA, IEEE, pp. 84-91, 1999.
-
(1999)
Proceedings of the International Symposium on Fault-Tolerant Computing, Madison(WI)
, pp. 84-91
-
-
Rotenberg, E.1
-
19
-
-
0012986889
-
-
December
-
The Berkeley NOW project, URL: http://now.cs.berkeley.edu, December 2000.
-
(2000)
-
-
-
20
-
-
0012943365
-
Effect of diagnosis coverage and preemption latencies on fault diagnosis schemes using idle capacity in multiprocessor systems
-
Newport Beach(CA), USA, IEEE
-
Reddy U., Tridandapani S., Somani A., "Effect of Diagnosis Coverage and Preemption Latencies on Fault Diagnosis Schemes Using Idle Capacity in Multiprocessor Systems", Proc. 1995 Pacific Rim International Symposium on Fault Tolerant Systems, Newport Beach(CA), USA, IEEE, pp. 213-218, 1995.
-
(1995)
Proc. 1995 Pacific Rim International Symposium on Fault Tolerant Systems
, pp. 213-218
-
-
Reddy, U.1
Tridandapani, S.2
Somani, A.3
-
21
-
-
0029342168
-
Low overhead multiprocessor allocation Strategies exploiting system spare capacity for fault detection and location
-
July
-
Tridandapani, S., Somani, A. K., and Reddy, U., "Low Overhead Multiprocessor Allocation Strategies Exploiting System Spare Capacity for Fault Detection and Location," IEEE Transactions on Computers, Vol. 44, No. 7, July 1995,
-
(1995)
IEEE Transactions on Computers
, vol.44
, Issue.7
-
-
Tridandapani, S.1
Somani, A.K.2
Reddy, U.3
-
22
-
-
0028594872
-
Compiler assisted fault detection for distributed-memory systems
-
Austin(TX), USA, IEEE
-
Gong C., Melhem R., Gupta R., "Compiler Assisted Fault Detection for Distributed-Memory Systems", Proceedings of the International Symposium on Fault-Tolerant Computing, Austin(TX), USA, IEEE, pp. 373-380, 1994.
-
(1994)
Proceedings of the International Symposium on Fault-Tolerant Computing
, pp. 373-380
-
-
Gong, C.1
Melhem, R.2
Gupta, R.3
-
23
-
-
0026173657
-
The UCLA mirror processor: A building block for self-checking self-repairing computing nodes
-
Montreal, Canada, IEEE
-
Tamir Y., Liang M., Lai T., Tremblay M., "The UCLA Mirror Processor: A Building Block for Self-Checking Self-Repairing Computing Nodes", Proceedings of the International Symposium on Fault-Tolerant Computing, Montreal, Canada, IEEE, pp. 178-185, 1991.
-
(1991)
Proceedings of the International Symposium on Fault-Tolerant Computing
, pp. 178-185
-
-
Tamir, Y.1
Liang, M.2
Lai, T.3
Tremblay, M.4
-
24
-
-
0029489482
-
A study of time redundant fault tolerance techniques for superscalar processors
-
Lafayette(LA), USA, IEEE
-
Franklin M., "A Study of Time Redundant Fault Tolerance Techniques for Superscalar Processors", IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems, Lafayette(LA), USA, IEEE, pp. 207-215, 1995.
-
(1995)
IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
, pp. 207-215
-
-
Franklin, M.1
-
25
-
-
0003465202
-
The simplescalar tool Set, Version 2.0
-
Univ. of Wisconsin, June
-
Burger D., Austin TM., "The SimpleScalar Tool Set, Version 2.0", Computer Sciences Department Technical Report, No. 1342, Univ. of Wisconsin, June 1997.
-
(1997)
Computer Sciences Department Technical Report
, vol.1342
-
-
Burger, D.1
Austin, T.M.2
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