A rail-to-rail CMOS operational amplifier design for low voltage systems

Asia-Pacific Microwave Conference Proceedings, APMC

Volumn 1, Issue , 2001, Pages 276-279

  Kao, Chia Hsiung ^a   Wei, Yin Fang ^a   Kuo, Huan Chou ^a  

^a NATIONAL SUN YAT SEN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRIC CURRENTS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC POTENTIAL; TRANSCONDUCTANCE;

DEAD ZONE; DYNAMIC LEVEL SHIFTING CIRCUIT; INPUT COMMON MODE VOLTAGES; LOW VOLTAGE RAIL TO RAIL OPERATIONAL AMPLIFIER; NON-LINEAR LEVEL SHIFTING CURRENT GENERATOR; SOFTWARE PACKAGE (HSPICE);

OPERATIONAL AMPLIFIERS;

EID: 0035731058     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (6)

1. Self-adjusting threshold-voltage scheme (SATS) for low-voltage high-speed operation
2. Low-voltage analog IC design in CMOS technology
3. Universal constant-gm input-stage architectures for low-voltage op amps
4. 1-V rail-to-rail operational amplifiers in standard CMOS technology
5. Constant-gm rail-to-rail CMOS op-amp input stage with overlapped transition regions