Study on UIO sequence generation for sequential machine's functional test

International Conference on ASIC, Proceedings

Volumn , Issue , 2001, Pages 628-632

  Sun, Haiping ^a   Gao, Minglun ^a   Liang, Alei ^a  

^a HEFEI UNIVERSITY OF TECHNOLOGY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; FINITE AUTOMATA; HEURISTIC METHODS; OPTIMIZATION; SEQUENTIAL MACHINES; VLSI CIRCUITS;

DISTINGUISHABLE STATE GROUP; FUNCTIONAL TEST; UNIQUE INPUT OUTPUT SEQUENCE;

INTEGRATED CIRCUIT TESTING;

EID: 0035719449     PISSN: None     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Conference Paper

References (8)

1. Fast state verification
2. Principles and methods of testing finite state machine: A survey
3. Testing finite state machines: State identification and verification
4. An approach for UIO generation for FSM verification and validation
5. An optimization technique for protocol conformance test generation based on UIO sequences and rural chinese postman tours
6. Test generation of state group differentiating sequence set for sequential systems