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Volumn , Issue , 2001, Pages 271-274
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A highly manufacturable, low-thermal budget, void and seam free pre-metal-dielectric process using new SOG for beyond 60nm DRAM and other devices
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Author keywords
[No Author keywords available]
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Indexed keywords
ASPECT RATIO;
DIELECTRIC DEVICES;
DIELECTRIC MATERIALS;
DYNAMIC RANDOM ACCESS STORAGE;
ELECTRIC RESISTANCE MEASUREMENT;
ETCHING;
INTEGRATED CIRCUIT MANUFACTURE;
NANOTECHNOLOGY;
SEMICONDUCTOR DEVICE TESTING;
SPIN GLASS;
LOW THERMAL BUDGET PROCESS;
SEAM FREE PRE-METAL DIELECTRIC PROCESS;
VOID FREE PRE-METAL DIELECTRIC PROCESS;
WET ETCH RESISTANCE;
VLSI CIRCUITS;
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EID: 0035715087
PISSN: 01631918
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (7)
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References (7)
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