Supervisory control of discrete event systems with CTL temporal logic specifications

Proceedings of the IEEE Conference on Decision and Control

Volumn 5, Issue , 2001, Pages 4122-4127

  Jiang, Shengbing ^a   Kumar, Ratnesh ^a  

^a UNIVERSITY OF KENTUCKY   (United States)

Author keywords

Discrete event system; Supervisory control; Temporal logic

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; CONSTRAINT THEORY; CONTROL SYSTEM SYNTHESIS; FORMAL LANGUAGES; SCADA SYSTEMS;

COMPUTATION TREE LOGIC; DISCRETE EVENT SYSTEMS; SUPERVISOR SYNTHESIS ALGORITHMS; TEMPORAL LOGIC SPECIFICATIONS;

DISCRETE TIME CONTROL SYSTEMS;

EID: 0035708505     PISSN: 01912216     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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