Deadlock avoidance for manufacturing systems with partially ordered process plans

IEEE Transactions on Robotics and Automation

Volumn 17, Issue 6, 2001, Pages 819-832

  Sulistyono, Widodo ^b   Lawley, Mark A ^a,b  

^a IEEE   (United States)

^b SCHOOL OF INDUSTRIAL ENGINEERING   (United States)

Author keywords

Deadlock avoidance; Discrete event dynamic systems; Flexible manufacturing; Flexible sequencing

Indexed keywords

DEADLOCK AVOIDANCE; DISCRETE EVENT DYNAMIC SYSTEM; FLEXIBLE SEQUENCING; OPTIMAL DEADLOCK AVOIDANCE; PARTIALLY ORDERED PROCESS PLANS; POLYNOMIAL COMPLEXITY;

ALGORITHMS; COLLISION AVOIDANCE; COMPUTATIONAL COMPLEXITY; DATA STRUCTURES; FORMAL LOGIC; POLYNOMIALS; PROCESS CONTROL; RESOURCE ALLOCATION;

FLEXIBLE MANUFACTURING SYSTEMS;

EID: 0035705591     PISSN: 1042296X     EISSN: None     Source Type: Journal    
DOI: 10.1109/70.976000     Document Type: Article

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