Yield increase of VLSI after redundancy-repairing

Proceedings of the Asian Test Symposium

Volumn , Issue , 2001, Pages 353-358

  Hirase, Junichi ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CONVERGENCE OF NUMERICAL METHODS; FAILURE ANALYSIS; LOGIC CIRCUITS; POISSON DISTRIBUTION; PROBABILITY; SWITCHING CIRCUITS;

DEFECT DISTRIBUTION FUNCTION; REDUNDANCY REPAIRING;

VLSI CIRCUITS;

EID: 0035699588     PISSN: None     EISSN: None     Source Type: Journal    
DOI: 10.1109/ATS.2001.990308     Document Type: Article

References (4)

1. A discussion of yield modeling with defect clustering, circuit repair, and circuit redundancy
2. Integrated circuit yield statistics
3. Defect level as a function of fault coverage
4. Study on the cost on on-site VLSI testing