On test and characterization of analog linear time-invariant circuits using neural networks

Proceedings of the Asian Test Symposium

Volumn , Issue , 2001, Pages 338-343

  Guo, Zhen ^a   Zhang, Xi Min ^a   Savir, Jacob ^a   Shi, Yun Qing ^a  

^a NEW JERSEY INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Characterization; Fault detection; Neural network; System on a chip

Indexed keywords

DELAY CIRCUITS; DESIGN FOR TESTABILITY; FAILURE ANALYSIS; INTEGRATED CIRCUIT TESTING; PATTERN RECOGNITION; VLSI CIRCUITS;

ANALOG LINEAR TIME INVARIANT CIRCUITS; TIME DELAY NEURAL NETWORKS;

NEURAL NETWORKS;

EID: 0035699295     PISSN: 10817735     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. Multiple fault diagnosis in analogue circuits using time domain response features and multilayer perceptrons
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7. Analog and digital control system design: Transfer function, state-space, and algebraic methods
8. Test generation for mixed-signal devices using signal flow graphs
9. Comparative study of stock trend prediction using time delay, recurrent and probabilistic neural networks
10. Algorithm-based fault detection of analog linear time-invariant circuits