Implementing ASIC/memory integration by system-on-package

IEEE Transactions on Components and Packaging Technologies

Volumn 24, Issue 4, 2001, Pages 641-644

  Tsai, R B ^a   Lu, Ray ^b   Lin, C L ^a   Chen, S K ^a   Tsai, Fang Jeng ^a   Tseng, Kuo Tai ^a  

^a ChipMOS TECHNOLOGIES Bermuda LTD   (Taiwan)

^b ARK Logic Inc   (United States)

Author keywords

ASIC; DRAM; EDO; Multichip package (MCP); Package; Plastic BGA; System on a chip (SOC); System on package (SOP)

Indexed keywords

APPROXIMATION THEORY; CHIP SCALE PACKAGES; DYNAMIC RANDOM ACCESS STORAGE; PRINTED CIRCUIT BOARDS; RELIABILITY THEORY; SUBSTRATES;

MULTICHIP PACKAGES (MCP);

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0035691647     PISSN: 15213331     EISSN: None     Source Type: Journal    
DOI: 10.1109/6144.974954     Document Type: Article

References (3)

1. A study on multichip package technology-Dual chip in TSOP II 54L package