Ramp testing of ADC transition levels using finite resolution ramps

IEEE International Test Conference (TC)

Volumn , Issue , 2001, Pages 495-501

  Max, Solomon ^a  

^a LTX Corporation   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; ELECTRIC POTENTIAL; EXTRAPOLATION; FEEDBACK; PROBABILITY; RAMP GENERATORS; SPURIOUS SIGNAL NOISE; TRANSFER FUNCTIONS;

FINITE RESOLUTION RAMPS;

ANALOG TO DIGITAL CONVERSION;

EID: 0035683948     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. Testing high speed high accuracy analog to digital conveners embedded in systems on a chip
2. Fast accurate and complete ADC testing
3. Histogram measurement of ADC nonlinearities using sine waves
4. Measuring code edges of adcs using interpolation and its application to offset and gain error testing
5. IEEE Std 1241: The benefits and risks of ADC histogram testing