Bit vs. symbol interleaving for parallel concatenated trellis coded modulation

Conference Record / IEEE Global Telecommunications Conference

Volumn 2, Issue , 2001, Pages 931-935

  Fragouli, Christina ^a   Wesel, Richard D ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIT ERROR RATE; COMPUTER SIMULATION; DECODING; ENCODING (SYMBOLS); ITERATIVE METHODS; MODULATION; TRELLIS CODES;

BIT-INTERLEAVED SYSTEMS;

TURBO CODES;

EID: 0035681226     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. Parallel concatenated trellis coded modulation
2. Turbo encoder design for symbol-interleaved parallel concatenated trellis-coded modulation
3. A novel bandwidth efficient coding scheme employing turbo codes
4. Bandwidth-efficient turbo trellis-coded modulation using punctured component codes
5. Turbo codes: Principles and applications
6. Semi random interleaver design criteria
7. Symbol interleaved parallel concatenated trellis coded modulation
8. Unveiling turbo codes: Some results on parallel concatenated coding schemes
9. A search for good convolutional codes to be used in the construction of turbo codes