Managing latency and buffer requirements in processing graph chains

Computer Journal

Volumn 44, Issue 6, 2001, Pages 486-503

  Goddard, Steve ^a   Jeffay, Kevin ^b  

^a UNIVERSITY OF NEBRASKA LINCOLN   (United States)

^b CB 3175 Sitterson Hall   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; BUFFER STORAGE; RAPID PROTOTYPING; REAL TIME SYSTEMS; SIGNAL PROCESSING; SOFTWARE PROTOTYPING;

PROCESSING GRAPH METHOD (PGM);

SOFTWARE ENGINEERING;

EID: 0035659186     PISSN: 00104620     EISSN: None     Source Type: Journal    
DOI: 10.1093/comjnl/44.6.486     Document Type: Article

References (20)

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