Compilation from Matlab to process networks realised in FPGA

Conference Record of the Asilomar Conference on Signals, Systems and Computers

Volumn 1, Issue , 2001, Pages 458-462

  Harriss, Tim ^a   Walke, Richard ^a   Kienhuis, Bart ^b   Deprettere, Ed ^b  

^a QINETIQ   (United Kingdom)

^b LEIDEN UNIVERSITY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER HARDWARE DESCRIPTION LANGUAGES; DATA STRUCTURES; FIELD PROGRAMMABLE GATE ARRAYS; LOGIC DESIGN; PARALLEL PROCESSING SYSTEMS; PROGRAM COMPILERS; PROGRAM TRANSLATORS;

CLOCK CYCLES; DECOMPOSITION ALGORITHM; PARALLEL KAHN PROCESS NETWORK; SOFTWARE PACKAGE COMPAAN;

COMPUTER AIDED SOFTWARE ENGINEERING;

EID: 0035574620     PISSN: 10586393     EISSN: None     Source Type: Journal    
DOI: 10.1109/ACSSC.2001.986968     Document Type: Article

References (5)

1. Compilation from Matlab to process networks
2. Systolic adaptive beamforming - Radar array processing
3. Virtex-II 1.5V field-programmable gate arrays
4. Exploring application model instances in system-level design
5. Design patterns, elements of reusable object-oriented software