Finite wordlength design for VLSI FFT processors

Conference Record of the Asilomar Conference on Signals, Systems and Computers

Volumn 2, Issue , 2001, Pages 1227-1231

  Perlow, Randall B ^a   Denk, Tracy C ^a  

^a BROADCOM CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FAST FOURIER TRANSFORMS; ORTHOGONAL FREQUENCY DIVISION MULTIPLEXING; SPURIOUS SIGNAL NOISE; TRANSCEIVERS; VLSI CIRCUITS;

FINITE WORDLENGTH DESIGN; HIGH SPEED COMMUNICATION;

DIGITAL SIGNAL PROCESSING;

EID: 0035574245     PISSN: 10586393     EISSN: None     Source Type: Journal    
DOI: 10.1109/ACSSC.2001.987686     Document Type: Article

References (2)

1. Pipeline and parallel-pipeline FFT processors for VLSI implementations