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Volumn 1, Issue , 2001, Pages 446-449

FPGA implementation of the ray tracing algorithm used in the XPATCH software

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COMPUTER SOFTWARE; FIELD PROGRAMMABLE GATE ARRAYS; RADAR IMAGING; RADAR TARGET RECOGNITION; RAY TRACING;

EID: 0035574050     PISSN: None     EISSN: None     Source Type: Journal    
DOI: 10.1109/MWSCAS.2001.986208     Document Type: Article
Times cited : (21)

References (9)
  • 1
    • 0006399405 scopus 로고    scopus 로고
    • Design and implementation of the XPATCH Ray tracer on a reconfigurable processor
    • Masters Thesis, Dept. of Electrical Engineering and Computer Science, The University of Toledo, Ohio, May
    • (1999)
    • Sundararajan, P.1
  • 9
    • 0006433731 scopus 로고    scopus 로고
    • FPGA implementation of XPATCH Ray tracer
    • Summer Research Extension Project, Wright Patterson Air Force Base, Dec
    • (1997)
    • Niamat, M.Y.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.