System-on-a-chip design methodologies and issues for transducer-to-pico-network applications

Midwest Symposium on Circuits and Systems

Volumn 2, Issue , 2001, Pages 930-934

  Fisher, John Sheridan ^a   Henz, Robert ^a   Devarajan, Deepika ^a   Abele, Jason ^a   Bibyk, Steven B ^a  

^a The Ohio State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; COMPUTER SIMULATION; HIGH LEVEL LANGUAGES; MICROPROCESSOR CHIPS; MODULATORS; NETWORK PROTOCOLS; REUSABILITY; SIGNAL RECEIVERS; TOPOLOGY; TRANSDUCERS;

SIGMA DELTA MODULATOR; TRANSDUCER TO PICO-NETWORK PROTOCOL; VERY HIGH DEFINITION LANGUAGES;

INTEGRATED CIRCUIT LAYOUT;

EID: 0035573218     PISSN: None     EISSN: None     Source Type: Journal    
DOI: 10.1109/MWSCAS.2001.986340     Document Type: Article

References (10)

1. A standard in support of smart transducer networking instrumentation and measurement
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3. Design issues in i and ii order sigma-delta modulators
4. An economical class of digital filters for decimation and interpolation
5. SPI serial EEPROMs 1M (131,072 × 8) AT25P1024 preliminary
6. PIC16C63A /65B /73B /74B, 8-Bit CMOS microcontrollers with A/D converter, 10.0 synchronous serial port (SSP) module