Stress-induced MOSFET mismatch for analog circuits

International Integrated Reliability Workshop Final Report

Volumn , Issue , 2001, Pages 41-43

  Chen, Yuan ^a   Zhou, Jonathon ^a   Tedja, Suharli ^a   Hui, Frank ^a   Oates, Anthony S ^a  

^a AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CURRENTS; ELECTRIC POTENTIAL; GATES (TRANSISTOR); HOT CARRIERS; RELIABILITY; STRESSES;

ANALOG CIRCUITS;

MOSFET DEVICES;

EID: 0035566438     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. Characterization and modeling of mismatch in MOS transistors for precision analogy design
2. Matching properties of MOS transistors
3. Statistical modeling of device mismatch for analog MOS integrated circuits