Deep submicron CMOS transistors for low-noise front-end systems

IEEE Nuclear Science Symposium and Medical Imaging Conference

Volumn 2, Issue , 2001, Pages 999-1003

  Manghisoni, M ^a   Ratti, L ^a   Re, V ^a   Speziali, V ^a  

^a INFN SEZIONE DI PAVIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; FITS AND TOLERANCES; IONIZING RADIATION; MATHEMATICAL MODELS; MICROELECTRONIC PROCESSING; PARAMETER ESTIMATION; SIGNAL NOISE MEASUREMENT; SPECTRUM ANALYSIS; TRANSISTORS; WHITE NOISE;

DEEP SUBMICRON TRANSISTORS; HIGH GRANULARITY DETECTORS; LOW NOISE FRONT END SYSTEMS; NOISE RADIATION TOLERANCE; NOISE VOLTAGE SPECTRUM;

HIGH ENERGY PHYSICS;

EID: 0035554551     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. Noise characterization of a 0.25 μm CMOS technology for the LHC experiments
2. Front-end electronics for pixel sensors
3. Noise in solid state devices and circuits
4. Experimental study and modeling of the white noise sources in submicron P and N-MOSFETs
5. Prospects for charge sensitive amplifiers in scaled CMOS
6. Experimental studies of the noise properties of a deep submicron CMOS process
7. Low-noise design criteria for detector readout systems in deep submicron CMOS technology
8. Study of the radiation tolerance of a 0.18 μm CMOS process