An algorithm for statistical static timing analysis considering correlations between delays

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E84-A, Issue 11, 2001, Pages 2746-2754

  Tsukiyama, Shuji ^a   Tanaka, Masakazu ^b   Fukui, Masahiro ^b  

^a CHUO UNIVERSITY   (Japan)

^b PANASONIC CORPORATION   (Japan)

Author keywords

CMOS combinatorial circuits; Correlation; Normal distribution; Static timing analysis; Statistical approach

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTER SIMULATION; CORRELATION METHODS; ELECTRIC NETWORK ANALYSIS; GRAPH THEORY; INTERCONNECTION NETWORKS; LOGIC GATES; MATHEMATICAL MODELS; MONTE CARLO METHODS; NORMAL DISTRIBUTION;

CIRCUIT DELAYS; STATIC TIMING ANALYSIS; SWITCHING DELAYS; WORSE CASE ANALYSIS;

CMOS INTEGRATED CIRCUITS;

EID: 0035518426     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (14)

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12. PRIMO: Probability interpretation of moment for delay calculation
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