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IEICE Transactions on Communications

Volumn E84-B, Issue 11, 2001, Pages 3041-3049

Power current model of LSI/IC containing equivalent internal impedance for EMI analysis of digital circuits

(6) Fukumoto, Yukihiro a Takahata, Yasuo b Wada, Osami b Toyota, Yoshita b Miyashita, Takuya b,c Koga, Ryuji b

a PANASONIC CORPORATION (Japan)

b OKAYAMA UNIVERSITY (Japan)

c FUJITSU LABORATORIES LTD (Japan)

Author keywords

EMI; High frequency current; LSI IC; Power bus noise; Simulation model

Indexed keywords

COMPUTER SIMULATION; ELECTRIC CURRENT MEASUREMENT; ELECTRIC IMPEDANCE; FREQUENCY DOMAIN ANALYSIS; LEAST SQUARES APPROXIMATIONS; LSI CIRCUITS; SIGNAL INTERFERENCE; SPURIOUS SIGNAL NOISE;

POWER BUS NOISE;

DIGITAL CIRCUITS;

EID: 0035517262 PISSN: 09168516 EISSN: None Source Type: Journal
DOI: None Document Type: Article

Times cited : (19)

References (12)

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2
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- IBIS (I/O Buffer Information Specification) ANSI/EIA-656-A Homepage

3
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4
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6
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- Power current model of digital IC with internal impedance for power decoupling simulation
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7
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8
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- (1999) 1999 Int. Symp. on EMC , pp. 224-226
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9
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10
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11
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12
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- Power decoupling circuit for measurement of EMC characteristics of IC/LSI
- Dec.
- (1999) IEICE Technical Report , vol.EMCJ99-101
- Wada, O.¹ Koga, R.² Fukumoto, Y.³

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