Effect of SiO2/Si interface roughness on gate current

Microelectronics Reliability

Volumn 41, Issue 11, 2001, Pages 1903-1907

  Mao, Ling Feng ^a   Yang, Yao ^b   Wei, Jian Lin ^a   Zhang, Heqiu ^a   Xu, Ming Zhen ^a   Tan, Chang Hua ^a  

^a PEKING UNIVERSITY   (China)

^b XIDIAN UNIVERSITY   (China)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TUNNELING; INTERFACES (MATERIALS); SCANNING ELECTRON MICROSCOPY; SEMICONDUCTING SILICON; SILICA; SURFACE ROUGHNESS; ULTRATHIN FILMS;

METAL OXIDE SEMICONDUCTORS (MOS);

MOSFET DEVICES;

EID: 0035501161     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00099-3     Document Type: Conference Paper

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