A new generation of IC processing: Low-power, high-performance SOI CMOS

Solid State Technology

Volumn 44, Issue 11, 2001, Pages 63-66+68

  Pelloie, J L ^a   Auberton Herve A ^a  

^a SOISIC   (France)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED DESIGN; INTEGRATED CIRCUIT LAYOUT; SEMICONDUCTING SILICON; SILICON ON INSULATOR TECHNOLOGY; TRANSISTORS;

PARTIAL LATERAL ISOLATION; SHALLOW TRENCH ISOLATION;

CMOS INTEGRATED CIRCUITS;

EID: 0035499613     PISSN: 0038111X     EISSN: None     Source Type: Trade Journal    
DOI: None     Document Type: Article

References (7)