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Volumn 17, Issue 5, 2001, Pages 589-598
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Production scheduling in a semiconductor wafer fabrication facility producing multiple product types with distinct due dates
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Author keywords
Batch scheduling; Lot release control; Lot scheduling; Semiconductor wafer fabrication; Simulation; Tardiness
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Indexed keywords
APPLICATION SPECIFIC INTEGRATED CIRCUITS;
COMPUTER SIMULATION;
DECISION MAKING;
MACHINERY;
PROCESS CONTROL;
PRODUCTION CONTROL;
SCHEDULING;
STATISTICAL METHODS;
BATCH SCHEDULING;
LOT RELEASE CONTROL;
LOT SCHEDULING;
PRODUCTION SCHEDULING;
SEMICONDUCTOR WAFER FABRICATION FACILITY;
TARDINESS;
SEMICONDUCTOR DEVICE MANUFACTURE;
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EID: 0035485317
PISSN: 1042296X
EISSN: None
Source Type: Journal
DOI: 10.1109/70.964660 Document Type: Article |
Times cited : (90)
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References (23)
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