Electrical transport in nano-scale silicon devices

IEICE Transactions on Electronics

Volumn E84-C, Issue 8, 2001, Pages 1037-1042

  Kawaura, H ^a   Sakamoto, T ^a  

^a NEC CORPORATION   (Japan)

Author keywords

EJ MOSFET; LHET; Tunneling hot electron

Indexed keywords

CARRIER MOBILITY; ELECTRIC CURRENT MEASUREMENT; ELECTRIC PROPERTIES; ELECTRON TRANSPORT PROPERTIES; ELECTRON TUNNELING; GATES (TRANSISTOR); LITHOGRAPHY; MOSFET DEVICES; NANOTECHNOLOGY; SEMICONDUCTING SILICON; TEMPERATURE MEASUREMENT; VOLTAGE MEASUREMENT;

ELECTRICAL TRANSPORT; ELECTRICALLY VARIABLE SHALLOW JUNCTION TRANSISTORS; ENERGY RELAXATION; LATERAL HOT ELECTRON TRANSISTORS; NANOSCALE SILICON DEVICES; SOURCE DRAIN TUNNELING; TUNNELING CURRENT;

SEMICONDUCTOR DEVICE TESTING;

EID: 0035422057     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (8)

1. Electron velocity overshoot at room and liquid nitrogen temperatures in silicon inversion layers
2. High transconductance and velocity overshoot in NMOS devices at the 0.1-μm gate-length level
3. Monte Carlo analysis of electron transport in small semiconductor devices including band structure and space-charge effects
4. Hot-carrier effects in MOS devices
5. Observation of source-to-drain direct tunneling current in 8-nm-gate EJ-MOSFETs
6. Proposal of pseudo source and drain MOSFETs for evaluating 10-nm gate MOSFETs
7. Characteristic length of hot-electron transport in silicon metal-oxide-semiconductor field-effect transistors
8. Ultra-high resolution of calixarene negative resist in electron beam lithography