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Volumn 19, Issue 4, 2001, Pages 1388-1391

Trench etch processes for dual damascene patterning of low-k dielectrics

Author keywords

[No Author keywords available]

Indexed keywords

ANTIREFLECTION COATINGS; COMPUTER SIMULATION; COPPER; DEFECTS; DIELECTRIC MATERIALS; PLASMA APPLICATIONS; SCANNING ELECTRON MICROSCOPY; SPUTTERING;

EID: 0035393610     PISSN: 07342101     EISSN: None     Source Type: Journal    
DOI: 10.1116/1.1380717     Document Type: Article
Times cited : (13)

References (7)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.