A 1.8-V MOSFET-only ΣΔ modulator using substrate biased depletion-mode MOS capacitors in series compensation

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 7, 2001, Pages 1041-1047

  Tille, Thomas ^a,b   Sauerbrey, Jens ^c   Schmitt Landsiedel, Doris ^a,b  

^a IEEE   (Germany)

^b TECHNICAL UNIVERSITY OF MUNICH   (Germany)

^c INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

Depletion mode; Low voltage; MOS capacitor; MOSFET only; Sigma delta modulator; Substrate biasing

Indexed keywords

SECOND-ORDER FULLY DIFFERENTIAL SINGLE-LOOP ARCHITECTURE; SERIES COMPENSATION TECHNIQUE; SIGMA-DELTA MODULATOR;

CAPACITANCE; CMOS INTEGRATED CIRCUITS; DELTA SIGMA MODULATION; ELECTRIC POTENTIAL; ELECTRIC POWER SUPPLIES TO APPARATUS; LINEARIZATION; MODULATORS; MOS CAPACITORS; SIGNAL TO NOISE RATIO; SPEECH PROCESSING; SUBSTRATES;

MOSFET DEVICES;

EID: 0035391061     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.933459     Document Type: Article

References (4)

1. High-linearity switched capacitor circuits in digital CMOS technology
2. MOSFET-only switched capacitor circuits in digital CMOS technology
3. Circuit arrangement for reducing the voltage dependence of a MOS capacitor