MNOS nonvolatile semiconductor memory technology: Present and future

IEICE Transactions on Electronics

Volumn E84-C, Issue 6, 2001, Pages 713-723

  Kamigaki, Yoshiaki ^a   Minami, Shin'Ichi ^a  

^a HITACHI LTD   (Japan)

Author keywords

EEPROM; MNOS (MONOS); Nonvolatile semiconductor memory; Trapping nitride; Tunnel oxide

Indexed keywords

ELECTRIC FIELD EFFECTS; ELECTRON TUNNELING; FILM GROWTH; HOLE TRAPS; MICROPROCESSOR CHIPS; MOBILE TELECOMMUNICATION SYSTEMS; OPTIMIZATION; PROM; SEMICONDUCTOR STORAGE; SILICON NITRIDE; SMART CARDS;

ELECTRICALLY-ERASABLE-AND-PROGRAMMABLE READ-ONLY-MEMORY (EEPROM); METAL-NITRIDE-OXIDE-SILICON (MNOS); NONVOLATILE SEMICONDUCTOR MEMORY;

NONVOLATILE STORAGE;

EID: 0035367442     PISSN: 09168524     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (35)

1. The variable threshold transistor, a new electrically-alterable, non-destructive read-only storage device
2. Memory behavior of an MNS capacitor
3. Charge transport and storage in Metal-Nitride-Oxide-Silicon (MNOS) structure
4. Theory of the switching behavior of MIS memory transistor
5. Discharge of MNOS structures
6. Silicon nitride trap properties as revealed by charge-centroid measurements on MNOS structures
7. Nonvolatile semiconductor memory devices
8. Theory of MNOS memory transistor
9. MNOS technology - Will it survive?
10. Thermal oxidation of silicon in various oxygen partial pressures diluted by nitrogen
11. Effects of high temperature hydrogen annealing on n-channel Si-gate MNOS devices
12. A 16 kb electrically erasable programmable ROM
13. A 16 kbit electrically erasable nonvolatile memory
14. A 5 volt RAM-like triple poly silicon EEPROM
15. 2 technologies
16. Yield and reliability of MNOS EEPROM products
17. Tunnel oxide thickness optimization for high-performance MNOS nonvolatile memory devices
18. New scaling guidelines for MNOS nonvolatile memory devices
19. 7 erase/write cycles
20. A 3V 1 Mbit full-featured EEPROM using a highly-reliable MONOS device technology
21. Scaling down MNOS nonvolatile memory devices
22. A highly reliable 256-kb MNOS EEPROM: Memory cell design technology
23. Theory of oxidation of metals
24. MNOS traps and tailored trap distribution gate dielectric MNOS
25. Dangling bonds in memory-quality silicon nitride films
26. Charge transport and storage of low programming voltage SONOS/MONOS memory devices
27. Investigation of charge trapping centers in LPCVD thin films
28. Investigations on ultrathin silicon nitride and silicon dioxide films in nonvolatile semiconductor memory (NVSM) transistors
29. Interface trap generation in silicon dioxide when electrons are captured by trapped holes
30. Degradation properties in metal-nitride-oxide-semiconductor structures
31. A true single-transistor oxide-nitride-oxide EEPROM device
32. Can NROM, a 2 bit, trapping storage NVM cell, give a real challenge to floating gate cells?
33. High performance SONOS memory cells free of drain turn-on and over-erase: Compatibility issue with current flash technology