Pipeline direct digital frequency synthesiser using decomposition method

IEE Proceedings: Circuits, Devices and Systems

Volumn 148, Issue 3, 2001, Pages 141-144

  Liu, S I ^a   Yu, T B ^a   Tsao, H W ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; PHASE LOCKED LOOPS; PIPELINE PROCESSING SYSTEMS; ROM; SIGNAL TO NOISE RATIO; SINGLE MODE FIBERS; SPURIOUS SIGNAL NOISE; WIRELESS TELECOMMUNICATION SYSTEMS;

PIPELINE DIRECT DIGITAL FREQUENCY SYNTHESIZERS;

FREQUENCY SYNTHESIZERS;

EID: 0035360494     PISSN: 13502409     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cds:20010158     Document Type: Article

References (16)

1. A digital frequency synthesizer
2. CMOS/SOS frequency synthesizer LSI circuit for spread spectrum communications
3. A 150 MHz direct digital frequency synthesizer in 1.25 μm CMOS with 90 dBc spurious performance
4. A 200 MHz quadrature digital synthesizer/mixer in a 0.8 μm CMOS
5. Methods of mapping from phase to sine amplitude in direct digital synthesizer
6. RNS-based enhancements for direct digital frequency synthesis
7. A CMOS floating point multiplier