Time-dependent breakdown of Ultra-thin SiO 2 gate dielectrics under pulsed biased stress

IEEE Electron Device Letters

Volumn 22, Issue 5, 2001, Pages 224-226

  Wang, Bin ^a,b   Suehle, John S ^a,c   Vogel, Eric M ^a,c   Bernstein, Joseph B ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF MARYLAND   (United States)

^c NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

Author keywords

CMOS; Defect generation; Reliability; Silicon dioxide; Time dependent dielectric breakdown

Indexed keywords

PULSE REPETITION FREQUENCY; PULSED BIASED STRESSES;

CMOS INTEGRATED CIRCUITS; DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; ELECTRIC POTENTIAL; SILICA;

ULTRATHIN FILMS;

EID: 0035336599     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.919236     Document Type: Article

References (16)