An approach to the specification and verification of a hardware compilation scheme

Journal of Supercomputing

Volumn 19, Issue 1, 2001, Pages 23-39

  Bowen, Jonathan P ^a   Jifeng, He ^b  

^a LONDON SOUTH BANK UNIVERSITY   (United Kingdom)

^b UNITED NATIONS UNIVERSITY   (Macao)

Author keywords

Digital systems; Formal specification; Hardware compilation; Parallel programming; Programmable hardware; Refinement; Verification

Indexed keywords

COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SOFTWARE; FIELD PROGRAMMABLE GATE ARRAYS; PARALLEL ALGORITHMS; PROGRAM COMPILERS; VLSI CIRCUITS;

HARDWARE COMPILATION SCHEMES;

COMPUTER HARDWARE;

EID: 0035336374     PISSN: 09208542     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1011184310224     Document Type: Article

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