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Volumn 19, Issue 1, 2001, Pages 77-91

Data buffering and allocation in mapping generalized template matching on reconfigurable systems

Author keywords

Configurable computing; Field programmable gate array (FPGA); Reconfiguration; Template matching

Indexed keywords

ALGORITHMS; AUTOMATIC TARGET RECOGNITION; CONSTRAINT THEORY; DATA ACQUISITION; DIGITAL FILTERS; IMAGE PROCESSING; PARALLEL PROCESSING SYSTEMS;

EID: 0035336235     PISSN: 09208542     EISSN: None     Source Type: Journal    
DOI: 10.1023/A:1011196613858     Document Type: Article
Times cited : (29)

References (9)
  • 7
    • 0032629222 scopus 로고    scopus 로고
    • A Scan-Based Configurable, Programmable, and Scalable Architecture for Sliding Window-Based Operations
    • C. Thibeault and G. Begin. A Scan-Based Configurable, Programmable, and Scalable Architecture for Sliding Window-Based Operations. IEEE Transactions on Computers, 48: pp. 615-627, 1999.
    • (1999) IEEE Transactions on Computers , vol.48 , pp. 615-627
    • Thibeault, C.1    Begin, G.2
  • 9
    • 0032646902 scopus 로고    scopus 로고
    • Reconfigurable Pipelined 2-D Convolvers for Fast Digital Signal Processing
    • B. Bosi, G. Bois, and Y Savaria. Reconfigurable Pipelined 2-D Convolvers for Fast Digital Signal Processing. IEEE Transactions on VLSI Systems, 7: 299-308, 1999.
    • (1999) IEEE Transactions on VLSI Systems , vol.7 , pp. 299-308
    • Bosi, B.1    Bois, G.2    Savaria, Y.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.