Modeling dc power-bus structures with vertical discontinuities using a circuit extraction approach based on a mixed-potential integral equation formulation

IEEE Transactions on Advanced Packaging

Volumn 24, Issue 2, 2001, Pages 143-157

  Fan, Jun ^a,b   Shi, Hao ^a,c   Orlandi, Antonio ^a,d   Knighten, James L ^a,b   Drewniak, James L ^a,e  

^a IEEE   (United States)

^b NCR CORPORATION   (United States)

^c AGILENT TECHNOLOGIES   (United States)

^d UNIVERSITY OF L'AQUILA   (Italy)

^e Architectural and Environmental Engineering   (United States)

Author keywords

Circuit extraction; Decoupling; Mixed potential integral equation; Power bus design; Via modeling

Indexed keywords

POWER-BUS STRUCTURES;

ELECTRIC POTENTIAL; EQUIVALENT CIRCUITS; GREEN'S FUNCTION; INTEGRAL EQUATIONS; MATRIX ALGEBRA; MULTILAYERS; SIGNAL INTERFERENCE; SPURIOUS SIGNAL NOISE; SURFACE MOUNT TECHNOLOGY;

PRINTED CIRCUIT BOARDS;

EID: 0035329184     PISSN: 15213323     EISSN: None     Source Type: Journal    
DOI: 10.1109/6040.928748     Document Type: Article

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