A computational image sensor with adaptive pixel-based integration time

IEEE Journal of Solid-State Circuits

Volumn 36, Issue 4, 2001, Pages 580-585

  Hamamoto, Takayuki ^a,b   Aizawa, Kiyoharu ^a,c  

^a IEEE   (Japan)

^b TOKYO UNIVERSITY OF SCIENCE   (Japan)

^c UNIVERSITY OF TOKYO   (Japan)

Author keywords

Column parallel architecture; Computational sensor; Dynamic range; Image sensor; Integration time

Indexed keywords

COLUMN PARALLEL ARCHITECTURE; COMPUTATIONAL SENSOR; INTEGRATION TIME;

CMOS INTEGRATED CIRCUITS; IMAGE COMPRESSION; PHOTODIODES; SIGNAL PROCESSING; SIGNAL TO NOISE RATIO;

IMAGE SENSORS;

EID: 0035309450     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.913735     Document Type: Article

References (7)

1. A wide dynamic range CMOS image sensor
2. Wide intrascene dynamic range CMOS APS using dual sampling
3. Integration time-based computational image sensors
4. CMOS active pixel sensor star tracker with regional electronic shutter
5. Focal plane compression and enhancement sensors
6. Computational image sensor for on sensor compression
7. Wide intrascene dynamic range CMOS APS using dual sampling