Material and process challenges in 100 nm interconnects module technology and beyond

Journal of Electronic Materials

Volumn 30, Issue 4, 2001, Pages 314-319

  Ohba, Takayuki ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

100 nm; Copper; Damascene; Interconnect; Low k; Thermal conductivity

Indexed keywords

CHEMICAL MECHANICAL POLISHING; COPPER; DIELECTRIC MATERIALS; ELECTROMIGRATION; FABRICATION; PERMITTIVITY; SEMICONDUCTOR DEVICE MANUFACTURE; THERMAL CONDUCTIVITY;

INTERCONNECTS MODULE TECHNOLOGY;

ULSI CIRCUITS;

EID: 0035306815     PISSN: 03615235     EISSN: None     Source Type: Journal    
DOI: 10.1007/s11664-001-0037-8     Document Type: Article

References (5)

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3. H. Kudo, K. Yoshie, S. Yamaguchi, K. Watanabe, M. Ikeda, K. Kakamura, T. Hosoda, K. Ohhira, N. Santoh, N. Misawa, K. Matsuno. Y. Wakasugi, A. Hasegawa, K. Nagase, and T. Suzuki, Proc. of IITC (Publisher's City: Publisher's Name, 2000), p. 270.
4. Int. Technol. Roadmap for Semiconductors 1999 Edition (San Jose, CA: SIA, 1999).
5. T. Ohba, Proc. 29th Int. Workshop on Selective and Functional Film Deposition Technol. (IUVSTA) and 2nd Int. Workshop on Development of Thin Films for future ULSI's and Nano-Scale Process Integration (JSPS) (Publisher's City: Publisher's Name, 2000), p. 81.