Compact and efficient code generation through program restructuring on limited memory embedded DSPs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 4, 2001, Pages 477-494

  Rele, Siddharth ^a   Jain, Vipin ^b   Pande, Santosh ^c   Ramanujam, J ^d  

^a 705 Engineering Research Center   (United States)

^b ORACLE CORPORATION   (United States)

^c Georgia Institute of Technology   (United States)

^d LOUISIANA STATE UNIVERSITY   (United States)

Author keywords

Code compaction; Complex instructing ISAs; DSPs

Indexed keywords

ALGORITHMS; DIGITAL SIGNAL PROCESSING; EMBEDDED SYSTEMS; HAMILTONIANS; PERFORMANCE; PROGRAM COMPILERS; TRAVELING SALESMAN PROBLEM;

CODE COMPACTION; HAMILTONIAN PATH PROBLEM; INSTRUCTION SET ARCHITECTURES; INTRAINSTRUCTION PARALLELISM;

CODES (SYMBOLS);

EID: 0035305813     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.918207     Document Type: Article

References (40)