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Volumn 48, Issue 4, 2001, Pages 394-399

A low-voltage sample-and-hold circuit in-standard CMOS technology operating at 40 Ms/s

Author keywords

Low voltage; Sample and hold; Switched capacitor circuits

Indexed keywords

CAPACITORS; ELECTRIC CONDUCTANCE; ELECTRIC POWER SUPPLIES TO APPARATUS; FREQUENCIES; HARMONIC DISTORTION; MOS DEVICES; OPERATIONAL AMPLIFIERS; THRESHOLD VOLTAGE;

EID: 0035300333     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.933801     Document Type: Article
Times cited : (40)

References (15)


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.