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Volumn 41, Issue 3, 2001, Pages 395-405

Investigations on double-diffused MOS transistors under ESD zap conditions

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; DIFFUSION; ELECTRIC CONTACTS; ELECTRIC DISCHARGES; ELECTRIC RESISTANCE; ELECTROSTATICS;

EID: 0035278221     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(00)00240-7     Document Type: Article
Times cited : (7)

References (9)
  • 5
    • 0031363103 scopus 로고    scopus 로고
    • On the use of N-well resistors for uniform triggering of ESD protection elements
    • Santa Clara, CA, USA. September
    • Notermans G. On the use of N-well resistors for uniform triggering of ESD protection elements. Proc 19th EOS/ESD Symp, EOS/ESD 97, Santa Clara, CA, USA. September 1997. p. 221-9.
    • (1997) Proc 19th EOS/ESD Symp, EOS/ESD 97 , pp. 221-229
    • Notermans, G.1
  • 8
    • 0000790344 scopus 로고
    • Improving the ESD failure threshold of silicided nMOS output transistors by ensuring uniform current flow
    • New Orleans, LO, USA. September
    • Polgreen T, Chatterjee A. Improving the ESD failure threshold of silicided nMOS output transistors by ensuring uniform current flow. Proc 11th EOS/ESD Symp, EOS/ESD 89, New Orleans, LO, USA. September 1989. p. 167-174.
    • (1989) Proc 11th EOS/ESD Symp, EOS/ESD 89 , pp. 167-174
    • Polgreen, T.1    Chatterjee, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.