An optimal allocation of carry-save-adders in arithmetic circuits

IEEE Transactions on Computers

Volumn 50, Issue 3, 2001, Pages 215-233

  Um, Junhyung ^a,b   Kim, Taewhan ^a,b  

^a Korea Advanced Institute of Science and Technology ^*

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

Arithmetic circuits; Carry save addition; VLSI

Indexed keywords

ALGORITHMS; OPTIMIZATION; TIMING CIRCUITS; VLSI CIRCUITS;

ARITHMETIC CIRCUITS; AUXILLARY PORTS; CARRY-SAVE-ADDERS; OPTIMAL ALLOCATION; POLYNOMIAL TIME ALGORITHM;

DIGITAL ARITHMETIC;

EID: 0035272390     PISSN: 00189340     EISSN: None     Source Type: Journal    
DOI: 10.1109/12.910813     Document Type: Article

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