Room temperature annealing behavior of copper-related deep levels in p-type floating zone silicon wafers

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 40, Issue 3 A, 2001, Pages 1167-1171

  Kurita, K ^a   Shingyouji, T ^a  

^a MITSUBISHI MATERIALS CORPORATION   (Japan)

Author keywords

Copper; Deep level; DLTS; Out diffusion; Precipitates; Silicon wafer

Indexed keywords

ANNEALING; COPPER; DEEP LEVEL TRANSIENT SPECTROSCOPY; DEFECTS; ELECTRON ENERGY LEVELS; PRECIPITATION (CHEMICAL); SEMICONDUCTOR DOPING;

OUT-DIFFUSION;

SILICON WAFERS;

EID: 0035269574     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.40.1167     Document Type: Article

References (26)