Dynamic load balancers for a multithreaded multiprocessor system

Parallel Processing Letters

Volumn 11, Issue 1, 2001, Pages 169-184

  Kakulavarapu, Prasad ^a   Maquelin, Olivier C ^a   Amaral, José Nelson ^b   Gao, Guang R ^c  

^a INTEL CORPORATION   (United States)

^b UNIVERSITY OF ALBERTA   (Canada)

^c UNIVERSITY OF DELAWARE   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER ARCHITECTURE; DATA STORAGE EQUIPMENT; PROGRAM COMPILERS;

DYNAMIC LOAD BALANCERS; EFFICIENT ARCHITECTURE FOR RUNNING THREADS; MULTITHREADED MULTIPROCESSOR SYSTEM;

MULTIPROCESSING SYSTEMS;

EID: 0035266177     PISSN: 01296264     EISSN: None     Source Type: Journal    
DOI: 10.1142/S0129626401000506     Document Type: Article

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