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IBM Journal of Research and Development

Volumn 45, Issue 2, 2001, Pages 229-243

High-throughput coherence control and hardware messaging in Everest

(4) Nanda, A K a Nguyen, A T a Michael, M M a Joseph, D J a

a IBM T J WATSON RESEARCH CENTER (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; DATA STORAGE EQUIPMENT; DISTRIBUTED COMPUTER SYSTEMS; NETWORK PROTOCOLS; PERSONAL COMPUTERS; PROGRAM PROCESSORS; SERVERS;

CACHE COHERENCE; DISTRIBUTED SHARED MEMORY SYSTEMS; MESSAGE PASSING; SHARED MULTIPROCESSORS;

COMPUTER ARCHITECTURE;

EID: 0035265873 PISSN: 00188646 EISSN: None Source Type: Journal
DOI: 10.1147/rd.452.0299 Document Type: Article

Times cited : (14)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.