Single-pass redundancy addition and removal

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2001, Pages 606-609

  Chang, C W ^a   Marek Sadowska, M ^a  

^a University of California   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; LOGIC GATES; REDUNDANCY; WIRE;

REWIRING METHOD;

LOGIC CIRCUITS;

EID: 0035208948     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)

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7. Libra - A library-independent framework for post-layout performance optimization
8. FIRE: A fault-independent combinational redundancy identification algorithm
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10. Recursive learning: A new implication technique for efficient solutions to CAD problems: Test, verification and optimization
11. Logic optimization and equivalence checking by implication analysis
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