Min-area retiming on flexible circuit structures

IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers

Volumn , Issue , 2001, Pages 176-182

  Baumgartner, J ^a   Kuehlmann, A ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARKING; LOGIC DESIGN; REDUNDANCY; SEQUENTIAL CIRCUITS;

FLEXIBLE CIRCUIT STRUCTURES; SEQUENTIAL REDUNDANCY;

COMBINATORIAL CIRCUITS;

EID: 0035208943     PISSN: 10923152     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)

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17. Optimizing sequential verification by retiming transformations