Investigations into the performance of multilevel PWM methods at low modulation indices

Conference Record - IAS Annual Meeting (IEEE Industry Applications Society)

Volumn 1, Issue , 2001, Pages 603-610

  Lai, Y S ^a   Shyu, F S ^a  

^a NATIONAL TAIPEI UNIVERSITY OF TECHNOLOGY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC POTENTIAL; ELECTRIC WAVEFORMS; HARMONIC DISTORTION; INSULATED GATE BIPOLAR TRANSISTORS; MATRIX ALGEBRA; MODULATION; POWER ELECTRONICS;

MULTILEVEL PULSE WIDTH MODULATION METHOD; SELECTIVE HARMONIC ELIMINATION PULSE WIDTH MODULATION; TOTAL HARMONIC DISTORTION; VIRTUAL STAGE PULSE WIDTH MODULATION TECHNIQUE;

ELECTRIC INVERTERS;

EID: 0035148668     PISSN: 01972618     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (16)

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9. A new multilevel PWM method: A theoretical analysis
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11. UPFC using multi converter operated by phase-shifted triangle carrier SPWM strategy
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14. Five-level GTO inverters for large induction motor drives
15. Multilevel PWM methods at low modulation indices
16. Optimum harmonic reduction with wide range of modulation indexes for multilevel converters