Process and structure designs for high performance Cu low-k interconnects

NEC Research and Development

Volumn 42, Issue 1, 2001, Pages 51-58

  Hayashi, Y ^a   Kawahara, J ^a   Shiba, K ^a   Tagami, M ^a   Saito, S ^a   Onodera, T ^a   Kinoshita, K ^a   Hiroi, M ^a  

^a NONE

Author keywords

Chemical mechanical polishing; Low k materials; Multilevel copper interconnects

Indexed keywords

ADHESION; CAPACITANCE; DEPOSITION; PERMITTIVITY; PLASMA POLYMERIZATION; STRENGTH OF MATERIALS; THERMODYNAMIC STABILITY; ULSI CIRCUITS;

MULTILEVEL COPPER INTERCONNECTS;

CMOS INTEGRATED CIRCUITS;

EID: 0035072399     PISSN: 0547051X     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (30)