A 1-V, 10-bit rail-to-rail successive approximation analog-to-digital converter in standard 0.18 μm CMOS technology

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 1, Issue , 2001, Pages 460-463

  Fayomi, Christian Jesus B ^a   Roberts, Gordon W ^b   Sawan, Molianiad ^a  

^a ÉCOLE POLYTECHNIQUE DE MONTRÉAL   (Canada)

^b MCGILL UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG CMOS SWITCHES; CMOS TECHNOLOGY; CURRENT-TO-VOLTAGE CONVERTERS; DIGITAL PROCESS; SINGLE CLOCK PHASE; SUCCESSIVE APPROXIMATION ANALOG-TO-DIGITAL CONVERTERS; SUCCESSIVE APPROXIMATIONS; TRACK AND HOLD CIRCUITS;

ANALOG TO DIGITAL CONVERSION; APPROXIMATION THEORY; CMOS INTEGRATED CIRCUITS; CIRCUIT THEORY; COMPARATOR CIRCUITS; ELECTRIC CONVERTERS; FLIP FLOP CIRCUITS; FORMAL LOGIC; LADDER NETWORKS; MOS DEVICES; SWITCHES;

DIGITAL INTEGRATED CIRCUITS; ANALOG TO DIGITAL CONVERSION;

CONTROL LOGIC; SUCCESSIVE APPROXIMATION METHOD;

EID: 0035019268     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921892     Document Type: Conference Paper

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