Reversed nested Miller compensation with current follower

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 1, Issue , 2001, Pages 308-311

  Mita, R ^a   Palumbo, G ^a   Pennisi, S ^a  

^a UNIVERSITY OF CATANIA   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS PROCESSS; COMPENSATION CAPACITORS; COMPENSATION TECHNIQUES; CURRENT FOLLOWERS; NESTED MILLER COMPENSATION; RIGHT HALF PLANE ZERO; SPICE SIMULATIONS; THEORETICAL DERIVATIONS;

CMOS INTEGRATED CIRCUITS; BROADBAND AMPLIFIERS;

CAPACITORS; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; GAIN CONTROL; TRANSCONDUCTANCE;

CURRENT FOLLOWER; NESTED-MILLER COMPENSATION TECHNIQUE;

EID: 0035019032     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISCAS.2001.921854     Document Type: Conference Paper

References (13)

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