Sub-domino logic: Ultra-low power dynamic sub-threshold digital logic

Proceedings of the IEEE International Conference on VLSI Design

Volumn , Issue , 2001, Pages 211-214

  Soeleman, H ^a   Roy, K ^a   Paul, B ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADDERS; CMOS INTEGRATED CIRCUITS; FORMAL LOGIC; THRESHOLD VOLTAGE; TRANSCONDUCTANCE; TRANSISTORS;

SUB-DOMINO LOGIC;

LOGIC CIRCUITS;

EID: 0035013773     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)